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Real Time with… IPC APEX EXPO 2024: My Role as a Technology Solutions Director

05/02/2024 | Real Time with...IPC APEX EXPO
Peter Tranitz, senior director of technology solutions at IPC, shares insights into his role as the design initiative lead. He details his advocacy work, industry support, and the responsibilities of the design initiative committee. The conversation also covers the revamping of standards, the IPC Design Competition, and the implementation of design rules in software tools.

Real Time with… IPC APEX EXPO 2024: Ventec Discusses New Pro-bond Family of Advanced Products

05/01/2024 | Real Time with...IPC APEX EXPO
Chris Hanson, Ventec's Global Head of IMS Technology, outlines the launch of four pro-bond formulas that deliver an outstanding combination of low dissipation factor (Df) with a dielectric constant (Dk) range to maximize the design window for critical PCB parameters. As Chris points out, Pro-bond is designed for low-loss, high-speed applications, while thermal-bond dissipates heat from a component through the board to a heat sink.

IPC's Vision for Empowering PCB Design Engineers

04/30/2024 | Robert Erickson, IPC
As architects of innovation, printed circuit board designers are tasked with translating increasingly complex concepts into tangible designs that power our modern world. IPC provides the necessary community, standards framework, and education to prepare these pioneers as they explore the boundaries of what’s possible, equipping engineers with the knowledge, skills, and resources required to thrive in an increasingly dynamic field.

On the Line With… Talks With Cadence Expert on SI/PI for PCB Designers

05/02/2024 | I-Connect007
In “PCB 3.0: A New Design Methodology—SI/PI for PCB Designers,” subject matter expert Brad Griffin, Cadence Design Systems, discusses how an intelligent system design methodology can move some signal and power integrity decision-making into the physical design space, offering real-time feedback. 

iNEMI Packaging Tech Topic Series: Role of EDA in Advanced Semiconductor Packaging

04/26/2024 | iNEMI
Advanced semiconductor packaging with heterogenous integration has made on-package integration of multiple chips a crucial part of finding alternatives to transistor scaling. Historically, EDA tools for front-end and back-end design have evolved separately; however, design complexity and the increased number of die-to-die or die-to-substrate interconnections has led to the need for EDA tools that can support integration of overall design planning, implementation, and system analysis in a single cockpit.
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